Lectures related to High-level synthesis

Automatic Optimization of Arithmetic Circuits

Explores automatic optimization of arithmetic circuits, addressing challenges in restructuring circuits for improved efficiency and performance.

How we design chips: The Digital VLSI Design Flow

Explores the principles and methodologies for designing integrated circuits, covering design flows, VLSI styles, abstraction levels, and the semiconductor ecosystem.

Instruction Set Extensions: High-Level Synthesis Techniques

Covers instruction set extensions and high-level synthesis techniques for optimizing embedded processors.

Reactive Anticipatory Robot Skills with Memory

Explores reactive anticipatory robot skills with memory for fast adaptation to changing objectives through time-correlations and memory feedback.

Semicustom RTL Design: Frontend with Synthesis

Covers the fundamentals of VLSI design, focusing on the semi-custom design flow.

Hardware Verification using High-Level Design Languages

Explores challenges in hardware verification, clear specifications, speculation harm, and cycle-precise semantics.

High-Level Synthesis: Formally Verified Elastic Circuits

Presents the development of a verified high-level synthesis compiler for elastic circuits.

Fourier Analysis: Applications and Inversion Formula

Explores Fourier analysis applications and the inversion formula in the context of periodicity and continuous functions.

Hardware Description Languages

Explores the history and significance of Hardware Description Languages in automating design processes and describing parallel hardware.

Robust Systems: Emerging Technologies and User Experience

Explores Professor Subashish Mitra's research on robust systems and pressing issues in ICT, emphasizing the importance of understanding the entire system for innovative solutions.

Synchronous Digital Circuits: Principles and Design

Covers principles of synchronous RTL design, custom digital circuits, Y-Diagram visualization, signal classes, and hierarchy management.

Logic Synthesis with B-Conditional BDDs

Explores the efficiency of B-Conditional BDDs for logic synthesis using double gate controllable polarity FETs.

Field Programmable Gate Arrays (FPGAs)

Covers the basic principles and architecture of Field Programmable Gate Arrays (FPGAs) and their implementation options for digital circuits.

Digital Design: Lowerbounds and Recommendations

Covers abstraction levels, EPFL design flow, lowerbounds, and layout recommendations.

FPGA Architecture: LUT and Routing Arrays

Explores FPGA architecture, including LUTs and routing arrays, scalability, and placement challenges.

Green's Theorem: Surface Integrals

Explores Green's Theorem applied to surface integrals, emphasizing regular surfaces and coordinate transformations.

Simulation-Based Verification

Explores simulation-based verification in VLSI systems using compiled-code and event-driven algorithms.

Laurent Series: Analysis and Applications

Explores Laurent series, regularity, singularities, and residues in complex analysis.

Project: Video Game

Covers the organization, objectives, project ideas, graphics enhancement, advanced adapters, and alternative interfaces for a video game project.

Formally Verified Chisel Designs

Explores formally verifying Chisel designs using SMT solvers and covers examples like delayed assertions and proofs by induction.