Mediaspace scheduled maintenance: Aug 25, 2026 07:00 - 12:00 AM. During this time, videos will be temporarily unavailable. Check status updates.

Concept

Microprocessor

Related publications (32)

A 24 kb Single-Well Mixed 3T Gain-Cell eDRAM with Body-Bias in 28 nm FD-SOI for Refresh-Free DSP Applications

Yusuf Leblebici, Andreas Peter Burg, Robert Giterman, Andrea Bonetti, Cosimo Aprile, Jonathan Emmanuel D Narinx, Nicolas Claude Frigerio

Logic-compatible gain-cell embedded DRAM (GC-eDRAM) is an emerging alternative to conventional SRAM for memory-dominated system-on-chip (SoC) designs due to its high-density, low-power, and two-ported operation. Although GCs have a limited data retention t ...

IEEE2019

i-DPs CGRA: An Interleaved-Datapaths Reconfigurable Accelerator for Embedded Bio-signal Processing

David Atienza Alonso, Giovanni Ansaloni, Miguel Peon Quiros, Soumya Subhra Basu, Loris Gérard Duch

Smart edge sensors for bio-signal monitoring must support complex signal processing routines within an extremely small energy envelope. Coarse-Grained Reconfigurable Arrays (CGRAs) are good candidates for tackling these conflicting objectives because, than ...

2019

Design and Validation of a Compact Embedded Photometric Device for Real-time Daylighting Computing in Office Buildings

Jean-Louis Scartezzini, Jérôme Henri Kämpf, Yujie Wu

Studies have shown that the exposure to daylight can have substantial visual/non-visual benefits for building occupants. To optimise daylighting provision while maintaining a comfortable visual environment, daylighting control systems have been investigate ...

2019

A Real-Time Multi-Camera Depth Estimation ASIC with Custom On-Chip Embedded DRAM

Jonathan Emmanuel D Narinx

The capability to process high-resolution videos in real-time is becoming more important in a wide variety of applications such as autonomous vehicles, virtual reality or intelligent surveillance systems. The high-accuracy and complex video processing algo ...

EPFL2019

Sub-Thermionic Scalable III-V Tunnel Field-Effect Transistors Integrated on Si (100)

Mihai Adrian Ionescu, Kirsten Emilie Moselund

We present scalable III-V heterojunction tunnel FETs fabricated using a Si CMOS-compatible FinFET process flow and integrated on Si (100) substrates. The tunneling junction is fabricated through self-aligned selective p(+) GaAsSb raised source epitaxial re ...

IEEE2019

Snap-On User-Space Manager for Dynamically Reconfigurable System-on-Chips

Paolo Ienne, Andrea Guerrieri, Sahand Kashani

Due to increased embedded processing requirements, modern SoCs are becoming heterogeneous computing platforms by combining traditional processing units with custom reconfigurable hardware accelerators (HAs) on an FPGA fabric. However, efficiently managing ...

2019

Excitonic Effects in Single Layer MoS2 Probed by Broadband Two-dimensional Electronic Spectroscopy

Andras Kis, Dumitru Dumcenco

We exploit two-dimensional electron spectroscopy to coherently excite the A and B excitons in monolayer MoS2. Combined with simulations, our data distinguish ultrafast bright excitons decoherence and sub-ps scattering decays to dark excitons. (c) 2019 The ...

IEEE2019

Hardware-conscious Hash-Joins on GPUs

Anastasia Ailamaki, Raja Appuswamy, Manolis Karpathiotakis, Periklis Chrysogelos, Panagiotis Sioulas

Traditionally, analytical database engines have used task parallelism provided by modern multisocket multicore CPUs for scaling query execution. Over the past few years, GPUs have started gaining traction as accelerators for processing analytical queries d ...

IEEE2019

Ultra High-Speed Hardware Emulator for Real-Time Fault Location in Multi-Conductor Power Systems

Maher Kayal, François Krummenacher, François Pierre Gaugaz

This research presents a transmission line model aimed for the fault location in power systems using a method based on the Electromagnetic Time-Reversal (EMTR). The discrete-time model simulates the waves travelling in the line by means of many unit delays ...

IEEE2018

Design Optimization of 3D Multi-Processor System-on-Chip with Integrated Flow Cell Arrays

David Atienza Alonso, Marina Zapater Sancho, Artem Andreev

Integrated flow cell array (FCA) is an emerging technology, targeting the cooling and power delivery challenges of modern 2D/3D Multi-Processor Systems-on-Chip (MPSoCs). In FCA, electrolytic solutions are pumped through microchannels etched in the silicon ...

2018

An area and power efficient on-the-fly LBCS transformation for implantable neuronal signal acquisition systems

Yusuf Leblebici, Volkan Cevher, Luca Baldassarre, Cosimo Aprile

A power and area effcient hardware encoding system tailored for wireless implantable applications is presented. Constant medical monitoring allowed by implantable devices is the most relevant alternative to current bulky monitoring systems, which, in case ...

2018

An area and power efficient on-the-fly LBCS transformation for implantable neuronal signal acquisition systems

Yusuf Leblebici, Volkan Cevher, Cosimo Aprile, Luca Baldassarre

A power and area efficient hardware encoding system tailored for wireless implantable applications is presented. Constant medical monitoring allowed by implantable devices is the most relevant alternative to current bulky monitoring systems, which, in case ...

ASSOC COMPUTING MACHINERY2018