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Concept

Haswell (microarchitecture)

Related publications (27)

Self-Aligned Lateral Dual-Gate Suspended-Body Single-Walled Carbon Nanotube Field-Effect Transistors

Mihai Adrian Ionescu, Ji Cao

Self-aligned lateral dual-gate suspended-body single-walled carbon nanotube (CNT) field-effect transistors (CNFETs) have been demonstrated. A nano-precision assembly method using resist-assisted ac-dielectrophoresis is applied. Superior I-V characteristics ...

American Institute of Physics2012

Scale-Out Processors

Babak Falsafi, Boris Robert Grot, Javier Picorel Obando, Yusuf Onur Koçberber, Stavros Volos, Dorde Jevdic, Pejman Lotfi Kamran, Michael Ferdman, Al Mutaz Adileh

Scale-out datacenters mandate high per-server throughput to get the maximum benefit from the large TCO investment. Emerging applications (e.g., data serving and web search) that run in these datacenters operate on vast datasets that are not accommodated by ...

Ieee2012

Parallel Rendering on Hybrid Multi-GPU Clusters

Achieving efﬁcient scalable parallel rendering for interactive visualization applications on medium-sized graphics clusters remains a challenging problem. Framerates of up to 60hz require a carefully designed and ﬁne-tuned parallel rendering implementation ...

The Eurographics Association2012

A 15.8 pJ/bit/iter quasi-cyclic LDPC decoder for IEEE 802.11n in 90 nm CMOS

Andreas Peter Burg, Christoph Studer, Pascal Andreas Meinerzhagen

We present a low-power quasi-cyclic (QC) low density parity check (LDPC) decoder that meets the throughput requirements of the highest-rate (600 Mbps) modes of the IEEE 802.11n WLAN standard. The design is based on the layered offset-min-sum algorithm and ...

IEEE2010

Interactive Parallel Analysis on the ALICE Grid with the PROOF Framework

Marco Meoni

The ALICE experiment at CERN LHC is intensively using a PROOF cluster for fast analysis and reconstruction. The current system (CAF - CERN Analysis Facility) consists of 120 CPU cores and about 45 TB of local space. PROOF enables interactive parallel proce ...

Springer-Verlag New York, Ms Ingrid Cunningham, 175 Fifth Ave, New York, Ny 10010 Usa2009

Reliability-Aware Design for Nanometer-Scale Devices

Giovanni De Micheli, David Atienza Alonso, Luca Benini, José Luis Ayala Rodrigo, Pablo Garcia del Valle

Continuous transistor scaling due to improvements in CMOS devices and manufacturing technologies is increasing processor power densities and temperatures; thus, creating challenges to maintain manufacturing yield rates and reliable devices in their expecte ...

2008

A Rapid Bootstrap Algorithm for the RAxML Web Servers

Jacques Rougemont, Alexandros Stamatakis

Despite recent advances achieved by application of high-performance computing methods and novel algorithmic techniques to maximum likelihood (ML)-based inference programs, the major computational bottleneck still consists in the computation of bootstrap su ...

Taylor and Francis, Oxford2008