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Related publications (20)

Rebooting Virtual Memory with Midgard

Siddharth Gupta

Virtual Memory (VM) is a critical programming abstraction that is widely used in various modern computing platforms. With the rise of datacenter computing and birth of planet-scale online services, the semantic and capacity requirements from memory have ev ...

EPFL2023

Midas: Systematic Kernel TOCTTOU Protection

Mathias Josef Payer, Atri Bhattacharyya, Uros Tesic

Double-fetch bugs are a plague across all major operating system kernels. They occur when data is fetched twice across the user/kernel trust boundary while allowing concurrent modification. Such bugs enable an attacker to illegally access memory, cause den ...

2022

Inter-actions parallel execution on GPU from high-level dataflow synthesis

Marco Mattavelli, Simone Casale Brunet, Aurélien François Gilbert Bloch

Recent GPU architectures make available numbers of parallel processing units that exceed by orders of magnitude the ones offered by CPU architectures. Whereas programs written using dataflow programming languages are well suited for programming heterogeneo ...

IEEE2022

Software Support for Non-Volatile Memory (NVM) Programming

David Teksen Aksun

Non-Volatile Memory (NVM) is an emerging type of memory device that provides fast, byte-addressable, and high-capacity durable storage. NVM sits on the memory bus and allows durable data structures designs similar to the in-memory equivalent ones. Expensiv ...

EPFL2021

Programming Heterogeneous CPU-GPU Systems by High-Level Dataflow Synthesis

Marco Mattavelli, Endri Bezati, Aurélien François Gilbert Bloch

Heterogeneous processing platforms combining in various architectures CPUs, GPUs, and programmable logic, are continuously evolving providing at each generation higher theoretical levels of computing performance. However, the challenge of how efficiently s ...

IEEE2020

Design of approximate and precision-scalable circuits for embedded multimedia and neural-network processing

Vincent Frédéric Camus

Density, speed and energy efficiency of integrated circuits have been increasing exponentially for the last four decades following Moore's law. However, power and reliability pose several challenges to the future of technology scaling. Approximate computin ...

EPFL2019

Sweat Biomarker Sensor Incorporating Picowatt, Three-Dimensional Extended Metal Gate Ion Sensitive Field Effect Transistors

Mihai Adrian Ionescu, Francesco Bellando, Hoël Maxime Guérin, Fabien Patrick Wildhaber, Erick Antonio Garcia Cordero, Junrui Zhang, Maneesha Rupakula, Guillaume Charles Henri Herment

Ion sensitive field effect transistors (ISFETs) form a very attractive solution for wearable sensors due to their capacity for ultra-miniaturization, low power operation, and very high sensitivity, supported by complementary metal oxide semiconductor (CMOS ...

2019

Low-Overhead Dynamic Instruction Mix Generation using Hybrid Basic Block Profiling

Willy Zwaenepoel, Andrzej Pawel Nowak

Dynamic instruction mixes form an important part of the toolkits of performance tuners, compiler writers, and CPU architects. Instruction mixes are traditionally generated using software instrumentation, an accurate yet slow method, that is normally limite ...

2018

Approximate 32-Bit Floating-Point Unit Design with 53% Power-Area Product Reduction

Christian Enz, Vincent Frédéric Camus, Jérémy Lucien Maurice Schlachter

The floating-point unit is one of the most common building block in any computing system and is used for a huge number of applications. By combining two state-of-the-art techniques of imprecise hardware, namely Gate-Level Pruning and Inexact Speculative Ad ...

Ieee2016

Energy-Aware Processing Platform Exploration for Embedded Biosignal Analysis

Ahmed Yasir Dogan

According to the World Health Organization, lifestyle-related diseases, e.g., cardiovascular diseases are the major cause of mortality worldwide. An accurate and continuous medical supervision is highly required for diagnosis and treatment of such diseases ...

EPFL2013

Towards Multi-Fabric 3D Integration Architectures

Panagiotis Athanasopoulos

The main aim of this thesis is to examine the advantages of 3D stacking applied to microprocessors and related integrated microprocessor systems in the architectural level. In the succession of years microprocessors are aiming towards lower power consumpti ...

EPFL2012

HW-SW Implementation of a Decoupled FPU for ARM-based Cortex-M1 SoCs in FPGAs

Giovanni De Micheli, Jaime Joven Murillo

Nowadays industrial monoprocessor and multipro- cessor systems make use of hardware floating-point units (FPUs) to provide software acceleration and better precision due to the necessity to compute complex software applications. This paper presents the des ...

2011

Dataflow Programming for Systems Design Space Exploration for Multicore Platforms

Christophe Lucarz

Nowadays processing systems are asked to support increasing complex and demanding high-performance applications, especially in the signal processing and video processing domains. The design of these systems are becoming extremely challenging because of sev ...

EPFL2011

Thermal-Aware Design of of 3D ICs with Inter-Tier Liquid Cooling

David Atienza Alonso

Advances in manufacturing technologies are enabling the development of 3D multi-processor ICs, but heat in 3D stacking can lead to degraded performance due to higher power density, which derives from the placement of computational units and storage compone ...

IEEE Press2010

Complete Nanowire Crossbar Framework Optimized for the Multi-Spacer Patterning Technique

Giovanni De Micheli, Yusuf Leblebici, Mohamed Haykel Ben Jamaa

Nanowire crossbar circuits are an emerging architectural paradigm that promises a higher integration density and an improved fault-tolerance due to its reconfigurability. In this paper, we propose for the first time the utilization of the multi-spacer patt ...

2009

An Analysis of Database System Performance on Chip Multiprocessors

Anastasia Ailamaki, Babak Falsafi, Frederick Ryan Johnson, Ippokratis Pandis

Prior research shows that database system performance is dominated by off-chip data stalls, resulting in a concerted effort to bring data into on-chip caches. At the same time, high levels of integration have enabled the advent of chip multiprocessors and ...

2007

Database Servers on Chip Multiprocessors: Limitations and Opportunities

Anastasia Ailamaki, Babak Falsafi, Frederick Ryan Johnson, Ippokratis Pandis

2007

VSH, an efficient and provable collision-resistant hash function

Arjen Lenstra

We introduce VSH, very smooth hash, a new S-bit hash function that is provably collision-resistant assuming the hardness of finding nontrivial modular square roots of very smooth numbers modulo an S-bit composite. By very smooth, we mean that the smoothnes ...

Springer Verlag2006

Reviving the Roman Odeon of Aphrodisias: Dynamic Animation and Variety Control of Crowds in Virtual Heritage

Daniel Thalmann, Jonathan Maim, Pablo Stanislaw De Heras Ciechomski, Sébastien Schertenleib

In this paper we propose a new method for rendering crowds of virtual humans with dynamicallydeformed skeletons with levels of detail using two simple caching schemes for animations and geometry. Weshow how the virtual heritage project ERATO pushed for the ...

2005

Integrated fluxgate compass for portable applications

Predrag Drljaca

Modern applications in industry, navigation and medicine demand small and sensitive magnetic field sensors. In this thesis we have developed a new planar micro fluxgate magnetometer. High resolution, low power consumption and orthogonal fields detection ma ...

EPFL2004