Mediaspace scheduled maintenance: Aug 25, 2026 07:00 - 12:00 AM. During this time, videos will be temporarily unavailable. Check status updates.

Concept

POWER1

Related publications (4)

Instruction-Level Power Side-Channel Leakage Evaluation of Soft-Core CPUs on Shared FPGAs

Mathias Josef Payer, Mirjana Stojilovic, Ognjen Glamocanin, Shashwat Shrivastava

Side-channel disassembly attacks recover CPU instructions from power or electromagnetic side-channel traces measured during code execution. These attacks typically rely on physical access, proximity to the victim device, and high sampling rate measuring in ...

2023

A Real-Time Multi-Camera Depth Estimation ASIC with Custom On-Chip Embedded DRAM

Jonathan Emmanuel D Narinx

The capability to process high-resolution videos in real-time is becoming more important in a wide variety of applications such as autonomous vehicles, virtual reality or intelligent surveillance systems. The high-accuracy and complex video processing algo ...

EPFL2019

Approximate 32-Bit Floating-Point Unit Design with 53% Power-Area Product Reduction

Christian Enz, Vincent Frédéric Camus, Jérémy Lucien Maurice Schlachter

The floating-point unit is one of the most common building block in any computing system and is used for a huge number of applications. By combining two state-of-the-art techniques of imprecise hardware, namely Gate-Level Pruning and Inexact Speculative Ad ...

Ieee2016

Performance and Energy Trade-offs Analysis of L2 on-Chip Cache Architectures for Embedded MPSoCs

Martino Ruggiero, Mohamed Mostafa Sabry Aly, Pablo Garcia del Valle

On-chip memory organization is one of the most important aspects that can influence the overall system behavior in multi-processor systems. Following the trend set by high-performance processors, high-end embedded cores are moving from single-level on chip ...

2010